Technical Field
The present invention relates to a semiconductor device, and to a technique applicable to, for example, a semiconductor device having a plurality of transistors connected in parallel to each other.
Related Art
In semiconductor devices in which power is controlled, a plurality of transistors for power control are often connected in parallel to each other. For example, Japanese Unexamined Patent Publication No. 2011-134984 discloses a semiconductor device having gate electrodes of a plurality of transistors and a gate pad connected to each other by one interconnect. When the semiconductor device having such a structure is used in a switching power supply device, as disclosed in Japanese Unexamined Patent Publication No. 2011-134984, ringing occurs during the turn-on and turn-off of transistors, and as a result, noise is generated in this semiconductor device. This causes the occurrence of voltage and current ringing due to parasitic LC of the semiconductor device itself and parasitic LC of the substrate itself when a switching semiconductor device is turned on and off. Such ringing gives rise to EMI noise (electromagnetic interference (noise)), which results in an adverse influence on various electronic devices.
Regarding the generation of noise from the semiconductor device, Japanese Unexamined Patent Publication No. 2011-134984 discloses that, in some transistors, the product (charging and discharging time constant) of the resistance of a gate electrode and the capacitance between gate electrodes is made to be larger than in other transistors.
In order to reduce EMI noise, it is important how the ringing which is the cause of the noise occurring due to the turn-on and turn-off of a switching semiconductor device is suppressed. In order to prevent such ringing, a method of inserting gate resistance and delaying a switching speed is considered. Incidentally, when a through-current is prevented from being generated by delaying a switching speed, a dead time period is required to be provided. In addition, in a switching semiconductor element which is used in a motor driving inverter, there is a problem of a drop in the efficiency of a motor.
When a plurality of transistors are connected in parallel to each other, it is preferable that a current flows equally in the plurality of transistors. However, in the technique disclosed in Japanese Unexamined Patent Publication No. 2011-134984, since charging and discharging time constants are caused to be different from each other between transistors, and thus it is necessary to cause the structure of some of the transistors to be different from the structure of other transistors. In this case, there is the possibility of a current concentrating on a specific transistor.
Other problems and novel features will be made clearer from the description and the accompanying drawings of the present specification.